1. Field of the Invention
The invention generally relates to memory technology. In particular, the invention relates to non-volatile magnetic memory.
2. Description of the Related Art
Computers and other digital systems use memory to store programs and data. A common form of memory is random access memory (RAM). Many memory devices, such as dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices are volatile memories. A volatile memory loses its data when power is removed. For example, when a conventional personal computer is powered off, the volatile memory is reloaded through a boot up process. In addition, certain volatile memories such as DRAM devices require periodic refresh cycles to retain their data even when power is continuously supplied.
In contrast to the potential loss of data encountered in volatile memory devices, nonvolatile memory devices retain data for long periods of time when power is removed. Examples of nonvolatile memory devices include read only memory (ROM), programmable read only memory (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), flash memory, and the like. Disadvantageously, conventional nonvolatile memories are relatively large, slow, and expensive. Further, conventional nonvolatile memories are relatively limited in write cycle capability and typically can only be programmed to store data about 10,000 times in a particular memory location. This prevents a conventional non-volatile memory device, such as a flash memory device, from being used as general purpose memory.
An alternative memory device is known as magnetoresistive random access memory (MRAM). An MRAM device uses magnetic orientations to retain data in its memory cells. Advantageously, MRAM devices are relatively fast, are nonvolatile, consume relatively little power, and do not suffer from a write cycle limitation. A pseudo spin valve (PSV) MRAM device uses an asymmetric sandwich of the ferromagnetic layers and metallic layer as a memory cell, and the ferromagnetic layers do not switch at the same time.
The asymmetric sandwich of a PSV MRAM includes a “hard layer” that stores data and a “soft layer” that switches or flips to allow data to be stored and read in the hard layer. When operating as intended, the soft layer switches before the hard layer. The earlier switching of the soft layer advantageously inhibits switching of the hard layer, which then results in a higher write threshold for a PSV MRAM than for a spin valve MRAM.
One problem with conventional PSV MRAM devices is that the magnetization of the soft layer is not well controlled. A soft layer that fails to switch at a relatively low applied magnetic field can result in a PSV MRAM device that undesirably behaves as a spin valve rather than a PSV. This reduces the write threshold and can result in corrupting the stored data during a read operation. To protect PSV MRAM devices from data corruption, the fields generated during read operations are maintained to relatively low levels, which results in relatively low repeatability and cyclability of writing to and reading from memory cells.